From 3b51560ae4d08a10a9301c1a5d953a985ec3b01c Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Tue, 13 Oct 2009 20:50:28 +0000 Subject: Revise ARM inline assembly memory operands to require the memory address to be in a register. The previous use of ARM address mode 2 was completely arbitrary and inappropriate for Thumb. Radar 7137468. llvm-svn: 84022 --- llvm/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'llvm/test/CodeGen/ARM') diff --git a/llvm/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll b/llvm/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll index 2fc9eb37417..1e2707f7b5b 100644 --- a/llvm/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll +++ b/llvm/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -march=arm | grep swp +; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -march=thumb | FileCheck %s ; PR4091 define void @foo(i32 %i, i32* %p) nounwind { +;CHECK: swp r2, r0, [r1] %asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind ret void } -- cgit v1.2.3