From 452f1f97bd6df8a94632664e67c5ed905b40897b Mon Sep 17 00:00:00 2001 From: David Majnemer Date: Tue, 4 Jun 2013 17:46:15 +0000 Subject: ARM: Fix crash in ARM backend inside of ARMConstantIslandPass The ARM backend did not expect LDRBi12 to hold a constant pool operand. Allow for LLVM to deal with the instruction similar to how it deals with LDRi12. This fixes PR16215. llvm-svn: 183238 --- llvm/test/CodeGen/ARM/load-address-masked.ll | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 llvm/test/CodeGen/ARM/load-address-masked.ll (limited to 'llvm/test/CodeGen/ARM/load-address-masked.ll') diff --git a/llvm/test/CodeGen/ARM/load-address-masked.ll b/llvm/test/CodeGen/ARM/load-address-masked.ll new file mode 100644 index 00000000000..43c98e45d4d --- /dev/null +++ b/llvm/test/CodeGen/ARM/load-address-masked.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -verify-machineinstrs | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" +target triple = "armv4t-unknown-linux-gnueabi" + +@a = global i32 0, align 4 + +define i32 @foo() { +entry: + ret i32 and (i32 ptrtoint (i32* @a to i32), i32 255) +} + +; CHECK: foo: +; CHECK: ldrb r0, .LCPI0_0 -- cgit v1.2.3