From 89efe24eba0b95c090c7e038f4ad78ad9a364d4d Mon Sep 17 00:00:00 2001 From: David Green Date: Thu, 21 Feb 2019 10:30:09 +0000 Subject: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs This adds a number of missing Thumb1 opcodes so that the peephole optimiser can remove redundant CMP instructions. Differential Revision: https://reviews.llvm.org/D57833 llvm-svn: 354564 --- llvm/test/CodeGen/ARM/intrinsics-overflow.ll | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'llvm/test/CodeGen/ARM/intrinsics-overflow.ll') diff --git a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll index d4c20dfacce..c3f64072d7d 100644 --- a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll +++ b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll @@ -38,8 +38,7 @@ define i32 @sadd_overflow(i32 %a, i32 %b) #0 { ; ARM: movvc r[[R0]], #0 ; ARM: mov pc, lr - ; THUMBV6: adds r1, r0, r1 - ; THUMBV6: cmp r1, r0 + ; THUMBV6: adds r0, r0, r1 ; THUMBV6: bvc .LBB1_2 ; THUMBV7: adds r[[R2:[0-9]+]], r[[R0]], r[[R1:[0-9]+]] -- cgit v1.2.3