From a5b9645c4b7a1d8be5e41081b99f27b49b8aa8cf Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Thu, 4 Jun 2009 22:49:04 +0000
Subject: Split the Add, Sub, and Mul instruction opcodes into separate integer
 and floating-point opcodes, introducing FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897
---
 llvm/test/CodeGen/ARM/illegal-vector-bitcast.ll | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'llvm/test/CodeGen/ARM/illegal-vector-bitcast.ll')

diff --git a/llvm/test/CodeGen/ARM/illegal-vector-bitcast.ll b/llvm/test/CodeGen/ARM/illegal-vector-bitcast.ll
index 79f9929b7df..ad24eb5dad7 100644
--- a/llvm/test/CodeGen/ARM/illegal-vector-bitcast.ll
+++ b/llvm/test/CodeGen/ARM/illegal-vector-bitcast.ll
@@ -3,7 +3,7 @@
 define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y)
 {
   %h = load <8 x float>* %f
-  %i = mul <8 x float> %h, <float 0x3FF19999A0000000, float 0x400A666660000000, float 0x40119999A0000000, float 0x40159999A0000000, float 0.5, float 0x3FE3333340000000, float 0x3FE6666660000000, float 0x3FE99999A0000000>
+  %i = fmul <8 x float> %h, <float 0x3FF19999A0000000, float 0x400A666660000000, float 0x40119999A0000000, float 0x40159999A0000000, float 0.5, float 0x3FE3333340000000, float 0x3FE6666660000000, float 0x3FE99999A0000000>
   %m = bitcast <8 x float> %i to <4 x i64>
   %z = load <4 x i64>* %y
   %n = mul <4 x i64> %z, %m
-- 
cgit v1.2.3