From 3e2c6f380c5700d17370a4bfa998acffeed1c32d Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Mon, 14 Nov 2011 23:03:21 +0000 Subject: ARM VLDR/VSTR instructions don't need a size suffix. Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. llvm-svn: 144583 --- llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll') diff --git a/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll b/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll index 3c9216cde7b..42b14914814 100644 --- a/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll +++ b/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll @@ -1,7 +1,7 @@ ; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s ; Should trigger a NEON store. -; CHECK: vstr.64 +; CHECK: vstr define void @f_0_12(i8* nocapture %c) nounwind optsize { entry: call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false) -- cgit v1.2.3