From 3f1c6fe156a8a1a3b17d008014af8938657fe466 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 21 Jun 2018 23:38:20 +0000 Subject: AMDGPU/GlobalISel: Implement select() for G_IMPLICIT_DEF Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D46150 llvm-svn: 335307 --- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir (limited to 'llvm/test/CodeGen/AMDGPU') diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir new file mode 100644 index 00000000000..750beb47486 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir @@ -0,0 +1,25 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN + +--- | + define amdgpu_kernel void @implicit_def(i32 addrspace(1)* %global0) {ret void} +... +--- + +name: implicit_def +legalized: true +regBankSelected: true + + +body: | + bb.0: + liveins: $vgpr3_vgpr4 + ; GCN-LABEL: name: implicit_def + ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4 + ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GCN: FLAT_STORE_DWORD [[COPY]], [[DEF]], 0, 0, 0, implicit $exec, implicit $flat_scr + %0:vgpr(s64) = COPY $vgpr3_vgpr4 + %1:vgpr(s32) = G_IMPLICIT_DEF + G_STORE %1, %0 :: (store 4 into %ir.global0) +... +--- -- cgit v1.2.3