From db7ee7660a8efce83ad34a3b211f5d3e624a3afd Mon Sep 17 00:00:00 2001 From: Alexander Timofeev Date: Tue, 11 Sep 2018 11:56:50 +0000 Subject: [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed Differential revision: https://reviews.llvm.org/D51734 Reviewers: rampitec llvm-svn: 341928 --- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll') diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll index bd8684de8c1..8e39caab6c5 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll @@ -212,7 +212,7 @@ define amdgpu_gs void @neg_olt(float %a) { ; SI-LABEL: {{^}}fcmp_x2: ; FIXME: LLVM should be able to combine these fcmp opcodes. -; SI: v_cmp_gt_f32 +; SI: v_cmp_lt_f32_e32 vcc, s{{[0-9]+}}, v0 ; SI: v_cndmask_b32 ; SI: v_cmpx_le_f32 define amdgpu_ps void @fcmp_x2(float %a) #0 { -- cgit v1.2.3