From 82e5e1e564d77dcd8babbfa9c2850912f94786e4 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 15 Jul 2016 21:27:08 +0000 Subject: AMDGPU: Fix TargetPrefix for remaining r600 intrinsics llvm-svn: 275619 --- llvm/test/CodeGen/AMDGPU/fmin.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'llvm/test/CodeGen/AMDGPU/fmin.ll') diff --git a/llvm/test/CodeGen/AMDGPU/fmin.ll b/llvm/test/CodeGen/AMDGPU/fmin.ll index bbf032c9fde..d044a7a0542 100644 --- a/llvm/test/CodeGen/AMDGPU/fmin.ll +++ b/llvm/test/CodeGen/AMDGPU/fmin.ll @@ -8,8 +8,8 @@ define amdgpu_ps void @test(<4 x float> inreg %reg0) { %r2 = fcmp uge float %r0, %r1 %r3 = select i1 %r2, float %r1, float %r0 %vec = insertelement <4 x float> undef, float %r3, i32 0 - call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) + call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0) ret void } -declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) +declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) -- cgit v1.2.3