From 6b114d2c50cd10b83e5b45524e006a1c6d34ca32 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 30 Aug 2017 01:20:17 +0000 Subject: AMDGPU: Select clamp pattern with v2f16 llvm-svn: 312087 --- llvm/test/CodeGen/AMDGPU/clamp.ll | 224 ++++++++++++++++++++++++++++++++------ 1 file changed, 190 insertions(+), 34 deletions(-) (limited to 'llvm/test/CodeGen/AMDGPU/clamp.ll') diff --git a/llvm/test/CodeGen/AMDGPU/clamp.ll b/llvm/test/CodeGen/AMDGPU/clamp.ll index 9735c7074be..2d6b4f3c0c5 100644 --- a/llvm/test/CodeGen/AMDGPU/clamp.ll +++ b/llvm/test/CodeGen/AMDGPU/clamp.ll @@ -1,8 +1,9 @@ -; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s -; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s +; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,VI %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,GFX9 %s ; GCN-LABEL: {{^}}v_clamp_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -17,7 +18,7 @@ define amdgpu_kernel void @v_clamp_f32(float addrspace(1)* %out, float addrspace } ; GCN-LABEL: {{^}}v_clamp_neg_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, -[[A]], -[[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_neg_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -33,7 +34,7 @@ define amdgpu_kernel void @v_clamp_neg_f32(float addrspace(1)* %out, float addrs } ; GCN-LABEL: {{^}}v_clamp_negabs_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, -|[[A]]|, -|[[A]]| clamp{{$}} define amdgpu_kernel void @v_clamp_negabs_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -51,7 +52,7 @@ define amdgpu_kernel void @v_clamp_negabs_f32(float addrspace(1)* %out, float ad } ; GCN-LABEL: {{^}}v_clamp_negzero_f32: -; GCN-DAG: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN-DAG: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN-DAG: v_bfrev_b32_e32 [[SIGNBIT:v[0-9]+]], 1 ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], [[SIGNBIT]], 1.0 define amdgpu_kernel void @v_clamp_negzero_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { @@ -67,7 +68,7 @@ define amdgpu_kernel void @v_clamp_negzero_f32(float addrspace(1)* %out, float a } ; GCN-LABEL: {{^}}v_clamp_multi_use_max_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e32 [[MAX:v[0-9]+]], 0, [[A]] ; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], 1.0, [[MAX]] define amdgpu_kernel void @v_clamp_multi_use_max_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { @@ -84,8 +85,8 @@ define amdgpu_kernel void @v_clamp_multi_use_max_f32(float addrspace(1)* %out, f } ; GCN-LABEL: {{^}}v_clamp_f16: -; GCN: {{buffer|flat}}_load_ushort [[A:v[0-9]+]] -; VI: v_max_f16_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} +; GCN: {{buffer|flat|global}}_load_ushort [[A:v[0-9]+]] +; GFX89: v_max_f16_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} ; SI: v_cvt_f32_f16_e64 [[CVT:v[0-9]+]], [[A]] clamp{{$}} ; SI: v_cvt_f16_f32_e32 v{{[0-9]+}}, [[CVT]] @@ -102,8 +103,8 @@ define amdgpu_kernel void @v_clamp_f16(half addrspace(1)* %out, half addrspace(1 } ; GCN-LABEL: {{^}}v_clamp_neg_f16: -; GCN: {{buffer|flat}}_load_ushort [[A:v[0-9]+]] -; VI: v_max_f16_e64 v{{[0-9]+}}, -[[A]], -[[A]] clamp{{$}} +; GCN: {{buffer|flat|global}}_load_ushort [[A:v[0-9]+]] +; GFX89: v_max_f16_e64 v{{[0-9]+}}, -[[A]], -[[A]] clamp{{$}} ; FIXME: Better to fold neg into max ; SI: v_cvt_f32_f16_e64 [[CVT:v[0-9]+]], -[[A]] clamp{{$}} @@ -122,8 +123,8 @@ define amdgpu_kernel void @v_clamp_neg_f16(half addrspace(1)* %out, half addrspa } ; GCN-LABEL: {{^}}v_clamp_negabs_f16: -; GCN: {{buffer|flat}}_load_ushort [[A:v[0-9]+]] -; VI: v_max_f16_e64 v{{[0-9]+}}, -|[[A]]|, -|[[A]]| clamp{{$}} +; GCN: {{buffer|flat|global}}_load_ushort [[A:v[0-9]+]] +; GFX89: v_max_f16_e64 v{{[0-9]+}}, -|[[A]]|, -|[[A]]| clamp{{$}} ; FIXME: Better to fold neg/abs into max @@ -146,7 +147,7 @@ define amdgpu_kernel void @v_clamp_negabs_f16(half addrspace(1)* %out, half addr ; FIXME: Do f64 instructions support clamp? ; GCN-LABEL: {{^}}v_clamp_f64: -; GCN: {{buffer|flat}}_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] +; GCN: {{buffer|flat|global}}_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] ; GCN: v_max_f64 v{{\[[0-9]+:[0-9]+\]}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -161,7 +162,7 @@ define amdgpu_kernel void @v_clamp_f64(double addrspace(1)* %out, double addrspa } ; GCN-LABEL: {{^}}v_clamp_neg_f64: -; GCN: {{buffer|flat}}_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] +; GCN: {{buffer|flat|global}}_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] ; GCN: v_max_f64 v{{\[[0-9]+:[0-9]+\]}}, -[[A]], -[[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_neg_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -177,7 +178,7 @@ define amdgpu_kernel void @v_clamp_neg_f64(double addrspace(1)* %out, double add } ; GCN-LABEL: {{^}}v_clamp_negabs_f64: -; GCN: {{buffer|flat}}_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] +; GCN: {{buffer|flat|global}}_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] ; GCN: v_max_f64 v{{\[[0-9]+:[0-9]+\]}}, -|[[A]]|, -|[[A]]| clamp{{$}} define amdgpu_kernel void @v_clamp_negabs_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -195,7 +196,7 @@ define amdgpu_kernel void @v_clamp_negabs_f64(double addrspace(1)* %out, double } ; GCN-LABEL: {{^}}v_clamp_med3_aby_negzero_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 define amdgpu_kernel void @v_clamp_med3_aby_negzero_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -208,7 +209,7 @@ define amdgpu_kernel void @v_clamp_med3_aby_negzero_f32(float addrspace(1)* %out } ; GCN-LABEL: {{^}}v_clamp_med3_aby_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_aby_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -221,7 +222,7 @@ define amdgpu_kernel void @v_clamp_med3_aby_f32(float addrspace(1)* %out, float } ; GCN-LABEL: {{^}}v_clamp_med3_bay_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_bay_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -234,7 +235,7 @@ define amdgpu_kernel void @v_clamp_med3_bay_f32(float addrspace(1)* %out, float } ; GCN-LABEL: {{^}}v_clamp_med3_yab_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_yab_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -247,7 +248,7 @@ define amdgpu_kernel void @v_clamp_med3_yab_f32(float addrspace(1)* %out, float } ; GCN-LABEL: {{^}}v_clamp_med3_yba_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_yba_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -260,7 +261,7 @@ define amdgpu_kernel void @v_clamp_med3_yba_f32(float addrspace(1)* %out, float } ; GCN-LABEL: {{^}}v_clamp_med3_ayb_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_ayb_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -273,7 +274,7 @@ define amdgpu_kernel void @v_clamp_med3_ayb_f32(float addrspace(1)* %out, float } ; GCN-LABEL: {{^}}v_clamp_med3_bya_f32: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_bya_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #0 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -350,7 +351,7 @@ define amdgpu_kernel void @v_clamp_constant_snan_f32(float addrspace(1)* %out) # ; --------------------------------------------------------------------- ; GCN-LABEL: {{^}}v_clamp_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], 0, 1.0 define amdgpu_kernel void @v_clamp_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -365,7 +366,7 @@ define amdgpu_kernel void @v_clamp_f32_no_dx10_clamp(float addrspace(1)* %out, f } ; GCN-LABEL: {{^}}v_clamp_f32_snan_dx10clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_f32_snan_dx10clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #3 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -380,7 +381,7 @@ define amdgpu_kernel void @v_clamp_f32_snan_dx10clamp(float addrspace(1)* %out, } ; GCN-LABEL: {{^}}v_clamp_f32_snan_no_dx10clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e32 [[MAX:v[0-9]+]], 0, [[A]] ; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], 1.0, [[MAX]] define amdgpu_kernel void @v_clamp_f32_snan_no_dx10clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #4 { @@ -396,7 +397,7 @@ define amdgpu_kernel void @v_clamp_f32_snan_no_dx10clamp(float addrspace(1)* %ou } ; GCN-LABEL: {{^}}v_clamp_f32_snan_no_dx10clamp_nnan_src: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], 0, 1.0 define amdgpu_kernel void @v_clamp_f32_snan_no_dx10clamp_nnan_src(float addrspace(1)* %out, float addrspace(1)* %aptr) #4 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -412,7 +413,7 @@ define amdgpu_kernel void @v_clamp_f32_snan_no_dx10clamp_nnan_src(float addrspac } ; GCN-LABEL: {{^}}v_clamp_med3_aby_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_aby_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -425,7 +426,7 @@ define amdgpu_kernel void @v_clamp_med3_aby_f32_no_dx10_clamp(float addrspace(1) } ; GCN-LABEL: {{^}}v_clamp_med3_bay_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_max_f32_e64 v{{[0-9]+}}, [[A]], [[A]] clamp{{$}} define amdgpu_kernel void @v_clamp_med3_bay_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -438,7 +439,7 @@ define amdgpu_kernel void @v_clamp_med3_bay_f32_no_dx10_clamp(float addrspace(1) } ; GCN-LABEL: {{^}}v_clamp_med3_yab_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], 0, 1.0 define amdgpu_kernel void @v_clamp_med3_yab_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -451,7 +452,7 @@ define amdgpu_kernel void @v_clamp_med3_yab_f32_no_dx10_clamp(float addrspace(1) } ; GCN-LABEL: {{^}}v_clamp_med3_yba_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 v{{[0-9]+}}, [[A]], 1.0, 0 define amdgpu_kernel void @v_clamp_med3_yba_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -464,7 +465,7 @@ define amdgpu_kernel void @v_clamp_med3_yba_f32_no_dx10_clamp(float addrspace(1) } ; GCN-LABEL: {{^}}v_clamp_med3_ayb_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 v{{[0-9]+}}, 0, [[A]], 1.0 define amdgpu_kernel void @v_clamp_med3_ayb_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -477,7 +478,7 @@ define amdgpu_kernel void @v_clamp_med3_ayb_f32_no_dx10_clamp(float addrspace(1) } ; GCN-LABEL: {{^}}v_clamp_med3_bya_f32_no_dx10_clamp: -; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]] +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] ; GCN: v_med3_f32 v{{[0-9]+}}, 1.0, [[A]], 0 define amdgpu_kernel void @v_clamp_med3_bya_f32_no_dx10_clamp(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 { %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -509,6 +510,159 @@ define amdgpu_kernel void @v_clamp_constant_snan_f32_no_dx10_clamp(float addrspa ret void } +; GCN-LABEL: {{^}}v_clamp_v2f16: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9-NOT: [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[A]], [[A]] clamp{{$}} +define amdgpu_kernel void @v_clamp_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> zeroinitializer) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_v2f16_undef_elt: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9-NOT: [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[A]], [[A]] clamp{{$}} +define amdgpu_kernel void @v_clamp_v2f16_undef_elt(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> ) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_v2f16_not_zero: +; GFX9: v_pk_max_f16 +; GFX9: v_pk_min_f16 +define amdgpu_kernel void @v_clamp_v2f16_not_zero(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> ) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_v2f16_not_one: +; GFX9: v_pk_max_f16 +; GFX9: v_pk_min_f16 +define amdgpu_kernel void @v_clamp_v2f16_not_one(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> ) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_neg_v2f16: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9-NOT: [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[A]], [[A]] neg_lo:[1,1] neg_hi:[1,1] clamp{{$}} +define amdgpu_kernel void @v_clamp_neg_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %fneg.a = fsub <2 x half> , %a + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %fneg.a, <2 x half> zeroinitializer) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_negabs_v2f16: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9: v_and_b32_e32 [[ABS:v[0-9]+]], 0x7fff7fff, [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[ABS]], [[ABS]] neg_lo:[1,1] neg_hi:[1,1] clamp{{$}} +define amdgpu_kernel void @v_clamp_negabs_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %fabs.a = call <2 x half> @llvm.fabs.v2f16(<2 x half> %a) + %fneg.fabs.a = fsub <2 x half> , %fabs.a + + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %fneg.fabs.a, <2 x half> zeroinitializer) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_neglo_v2f16: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9-NOT: [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[A]], [[A]] neg_lo:[1,1] clamp{{$}} +define amdgpu_kernel void @v_clamp_neglo_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %lo = extractelement <2 x half> %a, i32 0 + %neg.lo = fsub half -0.0, %lo + %neg.lo.vec = insertelement <2 x half> %a, half %neg.lo, i32 0 + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.lo.vec, <2 x half> zeroinitializer) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_neghi_v2f16: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9-NOT: [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[A]], [[A]] neg_hi:[1,1] clamp{{$}} +define amdgpu_kernel void @v_clamp_neghi_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %hi = extractelement <2 x half> %a, i32 1 + %neg.hi = fsub half -0.0, %hi + %neg.hi.vec = insertelement <2 x half> %a, half %neg.hi, i32 1 + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.hi.vec, <2 x half> zeroinitializer) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + +; GCN-LABEL: {{^}}v_clamp_v2f16_shuffle: +; GCN: {{buffer|flat|global}}_load_dword [[A:v[0-9]+]] +; GFX9-NOT: [[A]] +; GFX9: v_pk_max_f16 [[CLAMP:v[0-9]+]], [[A]], [[A]] op_sel:[1,1] op_sel_hi:[0,0] clamp{{$}} +define amdgpu_kernel void @v_clamp_v2f16_shuffle(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %aptr) #0 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %gep0 = getelementptr <2 x half>, <2 x half> addrspace(1)* %aptr, i32 %tid + %out.gep = getelementptr <2 x half>, <2 x half> addrspace(1)* %out, i32 %tid + %a = load <2 x half>, <2 x half> addrspace(1)* %gep0 + %shuf = shufflevector <2 x half> %a, <2 x half> undef, <2 x i32> + %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %shuf, <2 x half> zeroinitializer) + %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> ) + + store <2 x half> %med, <2 x half> addrspace(1)* %out.gep + ret void +} + declare i32 @llvm.amdgcn.workitem.id.x() #1 declare float @llvm.fabs.f32(float) #1 declare float @llvm.minnum.f32(float, float) #1 @@ -520,7 +674,9 @@ declare double @llvm.maxnum.f64(double, double) #1 declare half @llvm.fabs.f16(half) #1 declare half @llvm.minnum.f16(half, half) #1 declare half @llvm.maxnum.f16(half, half) #1 - +declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1 +declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>) #1 +declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>) #1 attributes #0 = { nounwind } attributes #1 = { nounwind readnone } -- cgit v1.2.3