From e8c03a25111054ee28ca71c2d75921589ef27861 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 8 Mar 2019 20:58:11 +0000 Subject: AMDGPU: Move d16 load matching to preprocess step When matching half of the build_vector to a load, there could still be a hidden dependency on the other half of the build_vector the pattern wouldn't detect. If there was an additional chain dependency on the other value, a cycle could be introduced. I don't think a tablegen pattern is capable of matching the necessary conditions, so move this into PreprocessISelDAG. Check isPredecessorOf for the other value to avoid a cycle. This has a warning that it's expensive, so this should probably be moved into an MI pass eventually that will have more freedom to reorder instructions to help match this. That is currently complicated by the lack of a computeKnownBits type mechanism for the selected function. llvm-svn: 355731 --- llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll') diff --git a/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll b/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll index fd81c0438d6..433baf43861 100644 --- a/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll +++ b/llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll @@ -4,9 +4,8 @@ ; combine and a generic insert_vector_elt combine. ; GCN-LABEL: {{^}}combine_loop: -; GCN: flat_load_ushort +; GCN: flat_load_short_d16_hi ; GCN: flat_store_short -; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, 16, define amdgpu_kernel void @combine_loop(i16* %arg) #0 { bb: br label %bb1 -- cgit v1.2.3