From fa5f767a38be412f75e4b1426356263c65291ec6 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 14 Sep 2016 15:19:03 +0000 Subject: AMDGPU: Improve splitting 64-bit bit ops by constants This addresses a TODO to handle operations besides and. This also starts eliminating no-op operations with a constant that can emerge later. llvm-svn: 281488 --- llvm/test/CodeGen/AMDGPU/bitreverse.ll | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'llvm/test/CodeGen/AMDGPU/bitreverse.ll') diff --git a/llvm/test/CodeGen/AMDGPU/bitreverse.ll b/llvm/test/CodeGen/AMDGPU/bitreverse.ll index 62e7904f438..0acaceaa6fe 100644 --- a/llvm/test/CodeGen/AMDGPU/bitreverse.ll +++ b/llvm/test/CodeGen/AMDGPU/bitreverse.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s declare i16 @llvm.bitreverse.i16(i16) #1 @@ -79,6 +79,7 @@ define void @s_brev_i64(i64 addrspace(1)* noalias %out, i64 %val) #0 { } ; FUNC-LABEL: {{^}}v_brev_i64: +; SI-NOT: v_or_b32_e64 v{{[0-9]+}}, 0, 0 define void @v_brev_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %valptr) #0 { %val = load i64, i64 addrspace(1)* %valptr %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1 -- cgit v1.2.3