From ef0d760cd928d4afec2d436c7efefc0cb6f1bbb0 Mon Sep 17 00:00:00 2001
From: Tim Northover <tnorthover@apple.com>
Date: Sun, 15 Jun 2014 09:27:06 +0000
Subject: AArch64: improve vector [su]itofp handling.

This somehow got missed in the AArch64 merge, so should fix a
performance regression since 3.4.

llvm-svn: 210984
---
 llvm/test/CodeGen/AArch64/complex-fp-to-int.ll | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/complex-fp-to-int.ll

(limited to 'llvm/test/CodeGen/AArch64/complex-fp-to-int.ll')

diff --git a/llvm/test/CodeGen/AArch64/complex-fp-to-int.ll b/llvm/test/CodeGen/AArch64/complex-fp-to-int.ll
new file mode 100644
index 00000000000..1ea47ade81e
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/complex-fp-to-int.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
+
+; CHECK: fptosi_1
+; CHECK: fcvtzs.2d
+; CHECK: xtn.2s
+; CHECK: ret
+define void @fptosi_1(<2 x double> %in, <2 x i32>* %addr) nounwind noinline ssp {
+entry:
+  %0 = fptosi <2 x double> %in to <2 x i32>
+  store <2 x i32> %0, <2 x i32>* %addr, align 8
+  ret void
+}
+
+; CHECK: fptoui_1
+; CHECK: fcvtzu.2d
+; CHECK: xtn.2s
+; CHECK: ret
+define void @fptoui_1(<2 x double> %in, <2 x i32>* %addr) nounwind noinline ssp {
+entry:
+  %0 = fptoui <2 x double> %in to <2 x i32>
+  store <2 x i32> %0, <2 x i32>* %addr, align 8
+  ret void
+}
+
-- 
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