From 79cad857a0e8fddccad46fcbc81c0ea66da7cfb7 Mon Sep 17 00:00:00 2001 From: Nicolai Haehnle Date: Thu, 17 Mar 2016 16:21:59 +0000 Subject: AMDGPU: mark atomic instructions as sources of divergence Summary: As explained by the comment, threads will typically see different values returned by atomic instructions even if the arguments are equal. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18156 llvm-svn: 263719 --- llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll (limited to 'llvm/test/Analysis/DivergenceAnalysis') diff --git a/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll b/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll new file mode 100644 index 00000000000..60d0de6035b --- /dev/null +++ b/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll @@ -0,0 +1,15 @@ +; RUN: opt -mtriple=amdgcn-- -analyze -divergence %s | FileCheck %s + +; CHECK: DIVERGENT: %orig = atomicrmw xchg i32* %ptr, i32 %val seq_cst +define i32 @test1(i32* %ptr, i32 %val) #0 { + %orig = atomicrmw xchg i32* %ptr, i32 %val seq_cst + ret i32 %orig +} + +; CHECK: DIVERGENT: %orig = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst +define {i32, i1} @test2(i32* %ptr, i32 %cmp, i32 %new) { + %orig = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst + ret {i32, i1} %orig +} + +attributes #0 = { "ShaderType"="0" } -- cgit v1.2.3