From fa9d7db17b76a6c139e28613a743950c719a1d36 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 31 May 2012 17:18:29 +0000 Subject: Add a PrintRegUnit helper similar to PrintReg. Reg-units are named after their root registers, and most units have a single root, so they simply print as 'AL', 'XMM0', etc. The rare dual root reg-units print as FPSCR~FPSCR_NZCV, FP0~ST7, ... The printing piggybacks on the existing register name tables, so no extra const data space is required. llvm-svn: 157754 --- llvm/lib/Target/TargetRegisterInfo.cpp | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp index a989cf4a7af..2395f2ba12a 100644 --- a/llvm/lib/Target/TargetRegisterInfo.cpp +++ b/llvm/lib/Target/TargetRegisterInfo.cpp @@ -46,6 +46,27 @@ void PrintReg::print(raw_ostream &OS) const { } } +void PrintRegUnit::print(raw_ostream &OS) const { + // Generic printout when TRI is missing. + if (!TRI) { + OS << "Unit~" << Unit; + return; + } + + // Check for invalid register units. + if (Unit >= TRI->getNumRegUnits()) { + OS << "BadUnit~" << Unit; + return; + } + + // Normal units have at least one root. + MCRegUnitRootIterator Roots(Unit, TRI); + assert(Roots.isValid() && "Unit has no roots."); + OS << TRI->getName(*Roots); + for (++Roots; Roots.isValid(); ++Roots) + OS << '~' << TRI->getName(*Roots); +} + /// getAllocatableClass - Return the maximal subclass of the given register /// class that is alloctable, or NULL. const TargetRegisterClass * -- cgit v1.2.3