From e7938423b246a72f03fe3f0c3aa7acfdb78e53d4 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 23 Sep 2018 19:16:32 +0000 Subject: Fix line ending mismatches. NFCI. llvm-svn: 342847 --- llvm/lib/Target/X86/X86SchedSandyBridge.td | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index f805e82b7e1..da42577395b 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -1118,12 +1118,12 @@ def SBWriteResGroup106 : SchedWriteRes<[SBPort1,SBPort23]> { } def: InstRW<[SBWriteResGroup106], (instregex "FICOM(P?)(16|32)m")>; -def SBWriteResGroup108 : SchedWriteRes<[SBPort05,SBPort23]> { - let Latency = 11; - let NumMicroOps = 11; - let ResourceCycles = [7,4]; -} -def: InstRW<[SBWriteResGroup108], (instregex "RCL(8|16|32|64)m", +def SBWriteResGroup108 : SchedWriteRes<[SBPort05,SBPort23]> { + let Latency = 11; + let NumMicroOps = 11; + let ResourceCycles = [7,4]; +} +def: InstRW<[SBWriteResGroup108], (instregex "RCL(8|16|32|64)m", "RCR(8|16|32|64)m")>; def SBWriteResGroup111 : SchedWriteRes<[SBPort0,SBPort23]> { -- cgit v1.2.3