From dcf00251ea2aedd8e40ea645d09efbd9f7c8b19a Mon Sep 17 00:00:00 2001 From: Louis Gerbarg Date: Mon, 16 Jun 2014 20:31:50 +0000 Subject: Improve comments for r211040 Added comment to clarify why we r211040 choose to bail out of fast isel instead of generating a more complicated relocation, and fix mislabelled register in the comments of the asan test case. llvm-svn: 211052 --- llvm/lib/Target/X86/X86FastISel.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index 4b8a8362c5a..e490c274b5f 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -2709,7 +2709,10 @@ unsigned X86FastISel::TargetMaterializeConstant(const Constant *C) { // Materialize addresses with LEA instructions. if (isa(C)) { - //LEA can only handle 32 bit immediates + // LEA can only handle 32 bit immediates. Currently this happens pretty + // rarely, so rather than deal with it just bail out of fast isel. If any + // architectures endis up needing to use this path a lot then fast isel + // could get the address with a MOV64ri and use that to load the value. if (TM.getRelocationModel() == Reloc::Static && Subtarget->is64Bit()) return false; -- cgit v1.2.3