From dcaa939ab75eadf0bea3753046b206288e94a7e9 Mon Sep 17 00:00:00 2001
From: Diana Picus <diana.picus@linaro.org>
Date: Thu, 21 Feb 2019 13:00:02 +0000
Subject: [ARM GlobalISel] Support G_FRAME_INDEX for Thumb2

Same as arm mode.

llvm-svn: 354579
---
 llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 4 +++-
 llvm/lib/Target/ARM/ARMLegalizerInfo.cpp       | 3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

(limited to 'llvm/lib')

diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
index 0c95c21054d..091f1ff807d 100644
--- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
+++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
@@ -98,6 +98,7 @@ private:
     unsigned LOAD8;
 
     unsigned ADDrr;
+    unsigned ADDri;
 
     // Used for G_ICMP
     unsigned CMPrr;
@@ -300,6 +301,7 @@ ARMInstructionSelector::OpcodeCache::OpcodeCache(const ARMSubtarget &STI) {
   STORE_OPCODE(LOAD8, LDRBi12);
 
   STORE_OPCODE(ADDrr, ADDrr);
+  STORE_OPCODE(ADDri, ADDri);
 
   STORE_OPCODE(CMPrr, CMPrr);
   STORE_OPCODE(MOVi, MOVi);
@@ -967,7 +969,7 @@ bool ARMInstructionSelector::select(MachineInstr &I,
   case G_FRAME_INDEX:
     // Add 0 to the given frame index and hope it will eventually be folded into
     // the user(s).
-    I.setDesc(TII.get(ARM::ADDri));
+    I.setDesc(TII.get(Opcodes.ADDri));
     MIB.addImm(0).add(predOps(ARMCC::AL)).add(condCodeOp());
     break;
   case G_GLOBAL_VALUE:
diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 5427c7fc0bb..1154d358bd3 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -138,6 +138,8 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
               {s32, p0, 32, 8},
               {p0, p0, 32, 8}});
 
+  getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0});
+
   auto &PhiBuilder =
       getActionDefinitionsBuilder(G_PHI)
           .legalFor({s32, p0})
@@ -155,7 +157,6 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
   }
 
   getActionDefinitionsBuilder(G_GLOBAL_VALUE).legalFor({p0});
-  getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0});
 
   if (ST.hasV5TOps()) {
     getActionDefinitionsBuilder(G_CTLZ)
-- 
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