From cf4c90f3d3861e44175b6e081af8fedfd8217e9a Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Mon, 6 Feb 2017 17:16:16 +0000 Subject: [InstCombine] simplify dyn_cast + isa; NFCI llvm-svn: 294198 --- llvm/lib/Transforms/InstCombine/InstructionCombining.cpp | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp index b74b3273acd..ba65ea6f510 100644 --- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -568,13 +568,11 @@ static Value *tryFactorization(InstCombiner::BuilderTy *Builder, if (isa(&I)) HasNSW = I.hasNoSignedWrap(); - if (BinaryOperator *Op0 = dyn_cast(LHS)) - if (isa(Op0)) - HasNSW &= Op0->hasNoSignedWrap(); + if (auto *LOBO = dyn_cast(LHS)) + HasNSW &= LOBO->hasNoSignedWrap(); - if (BinaryOperator *Op1 = dyn_cast(RHS)) - if (isa(Op1)) - HasNSW &= Op1->hasNoSignedWrap(); + if (auto *ROBO = dyn_cast(RHS)) + HasNSW &= ROBO->hasNoSignedWrap(); // We can propagate 'nsw' if we know that // %Y = mul nsw i16 %X, C -- cgit v1.2.3