From a2da22734fb4ece66c664df1141eec51981390d0 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Wed, 2 Jun 2010 01:08:27 +0000
Subject: Enable machine cse of instructions which define physical registers.

llvm-svn: 105308
---
 llvm/lib/CodeGen/MachineCSE.cpp | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

(limited to 'llvm/lib')

diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 6f4f7a88340..d8e2ec64da8 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -31,9 +31,6 @@ using namespace llvm;
 STATISTIC(NumCoalesces, "Number of copies coalesced");
 STATISTIC(NumCSEs,      "Number of common subexpression eliminated");
 
-static cl::opt<bool> CSEPhysDef("machine-cse-phys-defs",
-                                cl::init(false), cl::Hidden);
-
 namespace {
   class MachineCSE : public MachineFunctionPass {
     const TargetInstrInfo *TII;
@@ -376,7 +373,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
 
       // ... Unless the CS is local and it also defines the physical register
       // which is not clobbered in between.
-      if (PhysDef && CSEPhysDef) {
+      if (PhysDef) {
         unsigned CSVN = VNT.lookup(MI);
         MachineInstr *CSMI = Exps[CSVN];
         if (PhysRegDefReaches(CSMI, MI, PhysDef))
-- 
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