From 92a2635bbd239ba2a239a3f081e30a8c3873b465 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Fri, 27 Oct 2017 18:52:28 +0000 Subject: [Hexagon] Fix an incorrect assertion in HexagonConstExtenders.cpp Making sure that an instruction has fewer operands than required, then attempting to access one out of range is going to fail. llvm-svn: 316785 --- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp index 40e11451ede..1f4304f710e 100644 --- a/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp +++ b/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp @@ -1759,7 +1759,7 @@ bool HCE::replaceInstr(unsigned Idx, Register ExtR, const ExtenderInit &ExtI) { // Update offsets of the def's uses. for (std::pair P : RegOps) { unsigned J = P.second; - assert(P.first->getNumOperands() < J+1 && + assert(P.first->getNumOperands() > J+1 && P.first->getOperand(J+1).isImm()); MachineOperand &ImmOp = P.first->getOperand(J+1); ImmOp.setImm(ImmOp.getImm() + Diff); -- cgit v1.2.3