From 87aa18378e6aa5d7be4679cdfb17fdfdb29e29b9 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Wed, 5 Oct 2011 23:38:50 +0000 Subject: Remove a check from ARM shifted operand isel helper methods, which were blocking merging an lsl #2 that has multiple uses on A9. This shift is free, so there is no problem merging it in multiple places. Other unprofitable shifts will not be merged. llvm-svn: 141247 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index eabfdbb095c..0626240333d 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -519,11 +519,6 @@ bool ARMDAGToDAGISel::SelectLdStSOReg(SDValue N, SDValue &Base, SDValue &Offset, return false; } - if (Subtarget->isCortexA9() && !N.hasOneUse()) { - // Compute R +/- (R << N) and reuse it. - return false; - } - // Otherwise this is R +/- [possibly shifted] R. ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; ARM_AM::ShiftOpc ShOpcVal = @@ -1286,11 +1281,6 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue N, return false; } - if (Subtarget->isCortexA9() && !N.hasOneUse()) { - // Compute R + (R << [1,2,3]) and reuse it. - return false; - } - // Look for (R + R) or (R + (R << [1,2,3])). unsigned ShAmt = 0; Base = N.getOperand(0); -- cgit v1.2.3