From 55c014a9f38c707e23dfaae72d4e618bdd2523a8 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Mon, 10 Aug 2009 05:51:48 +0000 Subject: 80 col violation. llvm-svn: 78557 --- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index c179d8334df..2cddea92d5c 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -796,13 +796,14 @@ ARMBaseInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, bool ARMBaseInstrInfo::canFoldMemoryOperand(const MachineInstr *MI, - const SmallVectorImpl &Ops) const { + const SmallVectorImpl &Ops) const { if (Ops.size() != 1) return false; unsigned Opc = MI->getOpcode(); if (Opc == ARM::MOVr || Opc == ARM::t2MOVr) { // If it is updating CPSR, then it cannot be folded. - return MI->getOperand(4).getReg() != ARM::CPSR ||MI->getOperand(4).isDead(); + return MI->getOperand(4).getReg() != ARM::CPSR || + MI->getOperand(4).isDead(); } else if (Opc == ARM::FCPYS || Opc == ARM::FCPYD) { return true; } else if (Opc == ARM::VMOVD || Opc == ARM::VMOVQ) { -- cgit v1.2.3