From 3bfdb54d88d71b8cd8594d22d4b3712ee5661aa5 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 15 Jul 2019 19:45:49 +0000
Subject: AMDGPU/GlobalISel: Fix not constraining result reg of copies to VCC

llvm-svn: 366118
---
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'llvm/lib')

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 0d02e738b4b..f916154c319 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -116,6 +116,10 @@ bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {
       return RBI.constrainGenericRegister(DstReg, *RC, MRI);
     }
 
+    // TODO: Should probably leave the copy and let copyPhysReg expand it.
+    if (!RBI.constrainGenericRegister(DstReg, *TRI.getBoolRC(), MRI))
+      return false;
+
     BuildMI(*BB, &I, DL, TII.get(AMDGPU::V_CMP_NE_U32_e64), DstReg)
       .addImm(0)
       .addReg(SrcReg);
-- 
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