From 3014435ca93d284551f72c5558194d511edca93a Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Tue, 9 Dec 2014 16:52:29 +0000 Subject: [PowerPC 3/4] Little-endian adjustments for VSX vector shuffle When performing instruction selection for ISD::VECTOR_SHUFFLE, there is special code for handling v2f64 and v2i64 using VSX instructions. This code must be adjusted for little-endian. Because the two inputs are treated as a double-wide register, we must swap their order for little endian. To get the appropriate mask elements to use with the big-endian biased XXPERMDI instruction, we must reverse their order and invert the bits. A new test is added to test the 16 possible values of the shuffle mask. It is initially disabled for reasons specified in the test. It is re-enabled by patch 4/4. llvm-svn: 223791 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index e04d7e1bc35..595052ebc30 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -1380,6 +1380,15 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) { else DM[i] = 1; + // For little endian, we must swap the input operands and adjust + // the mask elements (reverse and invert them). + if (PPCSubTarget->isLittleEndian()) { + std::swap(Op1, Op2); + unsigned tmp = DM[0]; + DM[0] = 1 - DM[1]; + DM[1] = 1 - tmp; + } + SDValue DMV = CurDAG->getTargetConstant(DM[1] | (DM[0] << 1), MVT::i32); if (Op1 == Op2 && DM[0] == 0 && DM[1] == 0 && -- cgit v1.2.3