From 01dd4ea3347c987387f162b85a9ff1fe84d92aa1 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sat, 8 Aug 2015 07:20:04 +0000 Subject: Add SlowBTMem to Sandy Bridge and newer Intel CPUs. Reading through Agner Fog's table suggests there have been no improvements to these processors relative to Westmere for bit test instructions. llvm-svn: 244395 --- llvm/lib/Target/X86/X86.td | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'llvm/lib') diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 2965cefe3d3..9a09f3e38cf 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -307,6 +307,7 @@ def : WestmereProc<"westmere">; class SandyBridgeProc : ProcessorModel; // Legacy alias. class IvyBridgeProc : ProcessorModel; // Legacy alias. class HaswellProc : ProcessorModel; // Legacy alias. class BroadwellProc : ProcessorModel; class SkylakeProc : ProcessorModel; + FeatureCMPXCHG16B, FeatureSlowBTMem, FeatureFastUAMem, + FeaturePOPCNT, FeatureAES, FeaturePCLMUL, FeatureRDRAND, + FeatureF16C, FeatureFSGSBase, FeatureMOVBE, FeatureLZCNT, + FeatureBMI, FeatureBMI2, FeatureFMA, FeatureRTM, + FeatureHLE, FeatureSlowIncDec, FeatureMPX]>; def : SkylakeProc<"skylake">; def : SkylakeProc<"skx">; // Legacy alias. -- cgit v1.2.3