From 8722aa57545760f08bb6b29f48b8907499438628 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Fri, 9 May 2014 23:28:49 +0000 Subject: SLPVectorizer: When sorting by domination for CSE don't assert on unreachable code. There is no total ordering if the CFG is disconnected. We don't care if we catch all CSE opportunities in dead code either so just exclude ignore them in the assert. PR19646 llvm-svn: 208461 --- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp') diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index 0eb045e628b..cecb18b9183 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -1827,7 +1827,8 @@ void BoUpSLP::optimizeGatherSequence() { for (SmallVectorImpl::iterator I = CSEWorkList.begin(), E = CSEWorkList.end(); I != E; ++I) { - assert((I == CSEWorkList.begin() || !DT->dominates(*I, *std::prev(I))) && + assert((I == CSEWorkList.begin() || !DT->isReachableFromEntry(*I) || + !DT->dominates(*I, *std::prev(I))) && "Worklist not sorted properly!"); BasicBlock *BB = *I; // For all instructions in blocks containing gather sequences: -- cgit v1.2.3