From d9dde78c2739817d7c1d80710218992f2b3ad510 Mon Sep 17 00:00:00 2001 From: Richard Osborne Date: Wed, 9 Feb 2011 13:22:12 +0000 Subject: Add intrinsic for setc instruction on the XCore. llvm-svn: 125186 --- llvm/lib/Target/XCore/XCoreInstrInfo.td | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td index 581f38475a3..38cc734ce7c 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.td +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td @@ -610,8 +610,15 @@ def LDC_lru6 : _FLRU6< [(set GRRegs:$dst, immU16:$b)]>; } +def SETC_ru6 : _FRU6<(outs), (ins GRRegs:$r, i32imm:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, immU6:$val)]>; + +def SETC_lru6 : _FLRU6<(outs), (ins GRRegs:$r, i32imm:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, immU16:$val)]>; + // Operand register - U6 -// TODO setc let isBranch = 1, isTerminator = 1 in { defm BRFT: FRU6_LRU6_branch<"bt">; defm BRBT: FRU6_LRU6_branch<"bt">; @@ -806,6 +813,10 @@ def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src), "clz $dst, $src", [(set GRRegs:$dst, (ctlz GRRegs:$src))]>; +def SETC_l2r : _FRU6<(outs), (ins GRRegs:$r, GRRegs:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, GRRegs:$val)]>; + // One operand short // TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp // setdp, setcp, setv, setev, kcall -- cgit v1.2.3