From d55c7c6670231f96786cbe5aa96ef652cd955d42 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Mon, 2 Feb 2015 18:58:24 +0000 Subject: Sink queries into asserts since the variable is unused otherwise. llvm-svn: 227836 --- llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp index ae9ba7d8afa..3ce1ba6418e 100644 --- a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp @@ -68,7 +68,6 @@ char HexagonExpandPredSpillCode::ID = 0; bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { const HexagonSubtarget &QST = Fn.getSubtarget(); - const HexagonRegisterInfo *TRI = QST.getRegisterInfo(); const HexagonInstrInfo *TII = QST.getInstrInfo(); // Loop over all of the basic blocks. @@ -83,7 +82,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { if (Opc == Hexagon::STriw_pred) { // STriw_pred [R30], ofst, SrcReg; unsigned FP = MI->getOperand(0).getReg(); - assert(FP == TRI->getFrameRegister() && + assert(FP == QST.getRegisterInfo()->getFrameRegister() && "Not a Frame Pointer, Nor a Spill Slot"); assert(MI->getOperand(1).isImm() && "Not an offset"); int Offset = MI->getOperand(1).getImm(); @@ -130,7 +129,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { assert(Hexagon::PredRegsRegClass.contains(DstReg) && "Not a predicate register"); unsigned FP = MI->getOperand(1).getReg(); - assert(FP == TRI->getFrameRegister() && + assert(FP == QST.getRegisterInfo()->getFrameRegister() && "Not a Frame Pointer, Nor a Spill Slot"); assert(MI->getOperand(2).isImm() && "Not an offset"); int Offset = MI->getOperand(2).getImm(); -- cgit v1.2.3