From c7c6a9370490acb1a4c158e2227f0cdda7d08cb8 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Thu, 3 Apr 2014 07:06:13 +0000 Subject: ARM64: don't generate __sincos_stret calls unless on MachO This should fix PR19314. llvm-svn: 205514 --- llvm/lib/Target/ARM64/ARM64ISelLowering.cpp | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp index 956c57a6495..8164e6d2967 100644 --- a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp +++ b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp @@ -351,11 +351,16 @@ ARM64TargetLowering::ARM64TargetLowering(ARM64TargetMachine &TM) setOperationAction(ISD::PREFETCH, MVT::Other, Custom); - // For iOS, we don't want to the normal expansion of a libcall to - // sincos. We want to issue a libcall to __sincos_stret to avoid memory - // traffic. - setOperationAction(ISD::FSINCOS, MVT::f64, Custom); - setOperationAction(ISD::FSINCOS, MVT::f32, Custom); + if (Subtarget->isTargetMachO()) { + // For iOS, we don't want to the normal expansion of a libcall to + // sincos. We want to issue a libcall to __sincos_stret to avoid memory + // traffic. + setOperationAction(ISD::FSINCOS, MVT::f64, Custom); + setOperationAction(ISD::FSINCOS, MVT::f32, Custom); + } else { + setOperationAction(ISD::FSINCOS, MVT::f64, Expand); + setOperationAction(ISD::FSINCOS, MVT::f32, Expand); + } // ARM64 does not have floating-point extending loads, i1 sign-extending load, // floating-point truncating stores, or v2i32->v2i16 truncating store. -- cgit v1.2.3