From af38a8fed6c51303febfd8c423ed425bef25f9ac Mon Sep 17 00:00:00 2001 From: Simon Dardis Date: Tue, 19 Jun 2018 16:05:44 +0000 Subject: [mips] Mark microMIPS64 as being unsupported. There are no provided instruction definitions for this architecture. Reviewers: smaksimovic, atanasyan, abeserminji Differential Revision: https://reviews.llvm.org/D48320 llvm-svn: 335057 --- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 3 +++ llvm/lib/Target/Mips/MipsSubtarget.cpp | 2 ++ 2 files changed, 5 insertions(+) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 2ed3ff87f12..fb220715d48 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -521,6 +521,9 @@ public: if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode()) report_fatal_error("microMIPS64R6 is not supported", false); + + if (!isABI_O32() && inMicroMipsMode()) + report_fatal_error("microMIPS64 is not supported", false); } /// True if all of $fcc0 - $fcc7 exist for the current ISA. diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index f71031c9cf6..e5ba4fa5a8b 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -116,6 +116,8 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, if (hasMips64r6() && InMicroMipsMode) report_fatal_error("microMIPS64R6 is not supported", false); + if (!isABI_O32() && InMicroMipsMode) + report_fatal_error("microMIPS64 is not supported.", false); if (UseIndirectJumpsHazard) { if (InMicroMipsMode) -- cgit v1.2.3