From 9d0c6355a0563c07210d8d4ef39e2ac591b069ee Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Fri, 5 Jan 2018 20:46:41 +0000 Subject: [Hexagon] Add patterns for sext_inreg of HVX vector types llvm-svn: 321894 --- llvm/lib/Target/Hexagon/HexagonPatterns.td | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td index 3e028722426..d749e42649d 100644 --- a/llvm/lib/Target/Hexagon/HexagonPatterns.td +++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td @@ -3000,4 +3000,23 @@ let Predicates = [UseHVX] in { def: Pat<(VecI32 (zext_invec HVI16:$Vs)), (LoVec (VZxth $Vs))>; def: Pat<(VecI32 (zext_invec HVI8:$Vs)), (LoVec (VZxth (LoVec (VZxtb $Vs))))>; + + // The "source" types are not legal, and there are no parameterized + // definitions for them, but they are length-specific. + let Predicates = [UseHVX,UseHVX64B] in { + def: Pat<(VecI16 (sext_inreg HVI16:$Vs, v32i8)), + (V6_vasrh (V6_vaslh HVI16:$Vs, (A2_tfrsi 8)), (A2_tfrsi 8))>; + def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v32i8)), + (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 24)), (A2_tfrsi 24))>; + def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v16i16)), + (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 16)), (A2_tfrsi 16))>; + } + let Predicates = [UseHVX,UseHVX128B] in { + def: Pat<(VecI16 (sext_inreg HVI16:$Vs, v64i8)), + (V6_vasrh (V6_vaslh HVI16:$Vs, (A2_tfrsi 8)), (A2_tfrsi 8))>; + def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v64i8)), + (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 24)), (A2_tfrsi 24))>; + def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v32i16)), + (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 16)), (A2_tfrsi 16))>; + } } -- cgit v1.2.3