From 8c8fcb2585b45dec7091fc9f3617dd8ef2bc4ac4 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 25 Mar 2016 01:16:40 +0000 Subject: AMDGPU: Cost model for basic integer operations This resolves bug 21148 by preventing promotion to i64 induction variables. llvm-svn: 264376 --- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index 0d107af59bd..67ac351c38e 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -108,6 +108,37 @@ int AMDGPUTTIImpl::getArithmeticInstrCost( MVT::SimpleValueType SLT = LT.second.getScalarType().SimpleTy; switch (ISD) { + case ISD::SHL: + case ISD::SRL: + case ISD::SRA: { + if (SLT == MVT::i64) + return get64BitInstrCost() * LT.first * NElts; + + // i32 + return getFullRateInstrCost() * LT.first * NElts; + } + case ISD::ADD: + case ISD::SUB: + case ISD::AND: + case ISD::OR: + case ISD::XOR: { + if (SLT == MVT::i64){ + // and, or and xor are typically split into 2 VALU instructions. + return 2 * getFullRateInstrCost() * LT.first * NElts; + } + + return LT.first * NElts * getFullRateInstrCost(); + } + case ISD::MUL: { + const int QuarterRateCost = getQuarterRateInstrCost(); + if (SLT == MVT::i64) { + const int FullRateCost = getFullRateInstrCost(); + return (4 * QuarterRateCost + (2 * 2) * FullRateCost) * LT.first * NElts; + } + + // i32 + return QuarterRateCost * NElts * LT.first; + } case ISD::FADD: case ISD::FSUB: case ISD::FMUL: -- cgit v1.2.3