From 7e9ef4d7763c8e94d693b298cc8707a3e86af931 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Mon, 19 Jan 2009 08:08:22 +0000 Subject: Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself. llvm-svn: 62504 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 544b71cf8f8..0f5103b5c67 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4884,8 +4884,15 @@ SDValue X86TargetLowering::LowerUINT_TO_FP_i32(SDValue Op, SelectionDAG &DAG) { } SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) { - MVT SrcVT = Op.getOperand(0).getValueType(); + SDValue N0 = Op.getOperand(0); + + // Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't + // optimize it to a SINT_TO_FP when the sign bit is known zero. Perform + // the optimization here. + if (DAG.SignBitIsZero(N0)) + return DAG.getNode(ISD::SINT_TO_FP, Op.getValueType(), N0); + MVT SrcVT = N0.getValueType(); if (SrcVT == MVT::i64) { // We only handle SSE2 f64 target here; caller can handle the rest. if (Op.getValueType() != MVT::f64 || !X86ScalarSSEf64) -- cgit v1.2.3