From 6732f6ea5195fa2e6b02dbeecf48a7a3683f95b6 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Wed, 2 May 2018 18:48:23 +0000 Subject: [X86] Split WriteShuffle/WriteVarShuffle + WriteBlend/WriteVarBlend into XMM and YMM/ZMM scheduler classes llvm-svn: 331386 --- llvm/lib/Target/X86/X86SchedBroadwell.td | 31 ++---------- llvm/lib/Target/X86/X86SchedHaswell.td | 37 ++++++-------- llvm/lib/Target/X86/X86SchedSandyBridge.td | 8 ++- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 34 +++++-------- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 73 +++++----------------------- llvm/lib/Target/X86/X86Schedule.td | 12 +++-- llvm/lib/Target/X86/X86ScheduleAtom.td | 4 ++ llvm/lib/Target/X86/X86ScheduleBtVer2.td | 4 ++ llvm/lib/Target/X86/X86ScheduleSLM.td | 4 ++ llvm/lib/Target/X86/X86ScheduleZnver1.td | 4 ++ 10 files changed, 75 insertions(+), 136 deletions(-) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td index 999ecd32eb8..ee29d634a9a 100755 --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -206,9 +206,13 @@ defm : BWWriteResPair; // Vector integer shifts. defm : BWWriteResPair; // Vector integer multiply. defm : BWWriteResPair; // PMULLD defm : BWWriteResPair; // Vector shuffles. +defm : BWWriteResPair; // Vector shuffles (YMM/ZMM). defm : BWWriteResPair; // Vector variable shuffles. -defm : BWWriteResPair; // Vector blends. +defm : BWWriteResPair; // Vector variable shuffles (YMM/ZMM). +defm : BWWriteResPair; // Vector blends. +defm : BWWriteResPair; // Vector blends (YMM/ZMM). defm : BWWriteResPair; // Vector variable blends. +defm : BWWriteResPair; // Vector variable blends (YMM/ZMM). defm : BWWriteResPair; // Vector MPSAD. defm : BWWriteResPair; // Vector PSADBW. defm : BWWriteResPair; // Vector PHMINPOS. @@ -1079,30 +1083,6 @@ def: InstRW<[BWWriteResGroup74], (instregex "FCOM32m", "FCOMP32m", "FCOMP64m")>; -def BWWriteResGroup75 : SchedWriteRes<[BWPort5,BWPort23]> { - let Latency = 7; - let NumMicroOps = 2; - let ResourceCycles = [1,1]; -} -def: InstRW<[BWWriteResGroup75], (instregex "VPACKSSDWYrm", - "VPACKSSWBYrm", - "VPACKUSDWYrm", - "VPACKUSWBYrm", - "VPALIGNRYrmi", - "VPBLENDWYrmi", - "VPSHUFBYrm", - "VPSHUFDYmi", - "VPSHUFHWYmi", - "VPSHUFLWYmi", - "VPUNPCKHBWYrm", - "VPUNPCKHDQYrm", - "VPUNPCKHQDQYrm", - "VPUNPCKHWDYrm", - "VPUNPCKLBWYrm", - "VPUNPCKLDQYrm", - "VPUNPCKLQDQYrm", - "VPUNPCKLWDYrm")>; - def BWWriteResGroup76 : SchedWriteRes<[BWPort23,BWPort15]> { let Latency = 7; let NumMicroOps = 2; @@ -1293,7 +1273,6 @@ def BWWriteResGroup94 : SchedWriteRes<[BWPort5,BWPort23]> { } def: InstRW<[BWWriteResGroup94], (instregex "VMASKMOVPDYrm", "VMASKMOVPSYrm", - "VPBLENDVBYrm", "VPMASKMOVDYrm", "VPMASKMOVQYrm")>; diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index 8473c659f60..aec362ff885 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -201,11 +201,15 @@ defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; -defm : HWWriteResPair; +defm : HWWriteResPair; +defm : HWWriteResPair; +defm : HWWriteResPair; defm : HWWriteResPair; +defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; +defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; defm : HWWriteResPair; @@ -880,7 +884,6 @@ def: InstRW<[HWWriteResGroup13], (instregex "(V?)PACKSSDWrm", "(V?)PACKUSDWrm", "(V?)PACKUSWBrm", "(V?)PALIGNRrmi", - "(V?)PSHUFBrm", "(V?)PSHUFDmi", "(V?)PSHUFHWmi", "(V?)PSHUFLWmi", @@ -898,27 +901,16 @@ def HWWriteResGroup13_1 : SchedWriteRes<[HWPort5,HWPort23]> { let NumMicroOps = 2; let ResourceCycles = [1,1]; } -def: InstRW<[HWWriteResGroup13_1], (instregex "VPACKSSDWYrm", - "VPACKSSWBYrm", - "VPACKUSDWYrm", - "VPACKUSWBYrm", - "VPALIGNRYrmi", - "VPBLENDWYrmi", - "VPMOVSXBDYrm", +def: InstRW<[HWWriteResGroup13_1], (instregex "VPMOVSXBDYrm", "VPMOVSXBQYrm", - "VPMOVSXWQYrm", - "VPSHUFBYrm", - "VPSHUFDYmi", - "VPSHUFHWYmi", - "VPSHUFLWYmi", - "VPUNPCKHBWYrm", - "VPUNPCKHDQYrm", - "VPUNPCKHQDQYrm", - "VPUNPCKHWDYrm", - "VPUNPCKLBWYrm", - "VPUNPCKLDQYrm", - "VPUNPCKLQDQYrm", - "VPUNPCKLWDYrm")>; + "VPMOVSXWQYrm")>; + +def HWWriteResGroup13_2 : SchedWriteRes<[HWPort5,HWPort23]> { + let Latency = 6; + let NumMicroOps = 2; + let ResourceCycles = [1,1]; +} +def: InstRW<[HWWriteResGroup13_2], (instregex "MMX_PSHUFBrm")>; def HWWriteResGroup14 : SchedWriteRes<[HWPort6,HWPort23]> { let Latency = 6; @@ -1244,7 +1236,6 @@ def HWWriteResGroup36_1 : SchedWriteRes<[HWPort5,HWPort23]> { } def: InstRW<[HWWriteResGroup36_1], (instregex "VMASKMOVPDYrm", "VMASKMOVPSYrm", - "VPBLENDVBYrm", "VPMASKMOVDYrm", "VPMASKMOVQYrm")>; diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index 0b0817ce915..8923eb1fb38 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -181,9 +181,13 @@ defm : SBWriteResPair; defm : SBWriteResPair; defm : SBWriteResPair; // TODO this is probably wrong for 256/512-bit for the "generic" model defm : SBWriteResPair; -defm : SBWriteResPair; +defm : SBWriteResPair; +defm : SBWriteResPair; +defm : SBWriteResPair; defm : SBWriteResPair; +defm : SBWriteResPair; defm : SBWriteResPair; +defm : SBWriteResPair; defm : SBWriteResPair; defm : SBWriteResPair; defm : SBWriteResPair; @@ -884,6 +888,7 @@ def SBWriteResGroup51 : SchedWriteRes<[SBPort23,SBPort15]> { } def: InstRW<[SBWriteResGroup51], (instregex "MMX_PABS(B|D|W)rm", "MMX_PALIGNRrmi", + "MMX_PSHUFBrm", "MMX_PSIGN(B|D|W)rm")>; def SBWriteResGroup52 : SchedWriteRes<[SBPort23,SBPort015]> { @@ -995,7 +1000,6 @@ def: InstRW<[SBWriteResGroup59], (instregex "MMX_PADDQirm", "(V?)PMOVZXDQrm", "(V?)PMOVZXWDrm", "(V?)PMOVZXWQrm", - "(V?)PSHUFBrm", "(V?)PSHUFDmi", "(V?)PSHUFHWmi", "(V?)PSHUFLWmi", diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td index b76369da99c..37ad1684397 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -202,9 +202,13 @@ defm : SKLWriteResPair; // Vector integer shifts. defm : SKLWriteResPair; // Vector integer multiply. defm : SKLWriteResPair; defm : SKLWriteResPair; // Vector shuffles. -defm : SKLWriteResPair; // Vector shuffles. +defm : SKLWriteResPair; // Vector shuffles (YMM/ZMM). +defm : SKLWriteResPair; // Vector shuffles. +defm : SKLWriteResPair; // Vector shuffles (YMM/ZMM). defm : SKLWriteResPair; // Vector blends. +defm : SKLWriteResPair; // Vector blends (YMM/ZMM). defm : SKLWriteResPair; // Vector variable blends. +defm : SKLWriteResPair; // Vector variable blends (YMM/ZMM). defm : SKLWriteResPair; // Vector MPSAD. defm : SKLWriteResPair; // Vector PSADBW. defm : SKLWriteResPair; // Vector PHMINPOS. @@ -1268,7 +1272,6 @@ def: InstRW<[SKLWriteResGroup88], (instregex "(V?)PACKSSDWrm", "(V?)PALIGNRrmi", "VPBROADCASTBrm", "VPBROADCASTWrm", - "(V?)PSHUFBrm", "(V?)PSHUFDmi", "(V?)PSHUFHWmi", "(V?)PSHUFLWmi", @@ -1281,6 +1284,13 @@ def: InstRW<[SKLWriteResGroup88], (instregex "(V?)PACKSSDWrm", "(V?)PUNPCKLQDQrm", "(V?)PUNPCKLWDrm")>; +def SKLWriteResGroup88a : SchedWriteRes<[SKLPort5,SKLPort23]> { + let Latency = 6; + let NumMicroOps = 2; + let ResourceCycles = [1,1]; +} +def: InstRW<[SKLWriteResGroup88a], (instregex "MMX_PSHUFBrm")>; + def SKLWriteResGroup89 : SchedWriteRes<[SKLPort5,SKLPort01]> { let Latency = 7; let NumMicroOps = 2; @@ -1496,29 +1506,11 @@ def: InstRW<[SKLWriteResGroup108], (instregex "FCOM32m", "FCOM64m", "FCOMP32m", "FCOMP64m", - "VPACKSSDWYrm", - "VPACKSSWBYrm", - "VPACKUSDWYrm", - "VPACKUSWBYrm", - "VPALIGNRYrmi", - "VPBLENDWYrmi", "VPBROADCASTBYrm", "VPBROADCASTWYrm", "VPMOVSXBDYrm", "VPMOVSXBQYrm", - "VPMOVSXWQYrm", - "VPSHUFBYrm", - "VPSHUFDYmi", - "VPSHUFHWYmi", - "VPSHUFLWYmi", - "VPUNPCKHBWYrm", - "VPUNPCKHDQYrm", - "VPUNPCKHQDQYrm", - "VPUNPCKHWDYrm", - "VPUNPCKLBWYrm", - "VPUNPCKLDQYrm", - "VPUNPCKLQDQYrm", - "VPUNPCKLWDYrm")>; + "VPMOVSXWQYrm")>; def SKLWriteResGroup109 : SchedWriteRes<[SKLPort01,SKLPort23]> { let Latency = 8; diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index 667b51972f6..4ad03642786 100755 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -202,9 +202,13 @@ defm : SKXWriteResPair; // Vector integer shifts. defm : SKXWriteResPair; // Vector integer multiply. defm : SKXWriteResPair; // Vector integer multiply. defm : SKXWriteResPair; // Vector shuffles. -defm : SKXWriteResPair; // Vector variable shuffles. +defm : SKXWriteResPair; // Vector shuffles (YMM/ZMM). +defm : SKXWriteResPair; // Vector variable shuffles. +defm : SKXWriteResPair; // Vector variable shuffles (YMM/ZMM). defm : SKXWriteResPair; // Vector blends. +defm : SKXWriteResPair; // Vector blends (YMM/ZMM). defm : SKXWriteResPair; // Vector variable blends. +defm : SKXWriteResPair; // Vector variable blends (YMM/ZMM). defm : SKXWriteResPair; // Vector MPSAD. defm : SKXWriteResPair; // Vector PSADBW. defm : SKXWriteResPair; // Vector PHMINPOS. @@ -2167,8 +2171,6 @@ def: InstRW<[SKXWriteResGroup92], (instregex "VMOVSDZrm(b?)", "VPBROADCASTBrm", "VPBROADCASTWZ128m(b?)", "VPBROADCASTWrm", - "VPSHUFBZ128rm(b?)", - "(V?)PSHUFBrm", "VPSHUFDZ128m(b?)i", "(V?)PSHUFDmi", "VPSHUFHWZ128mi(b?)", @@ -2194,6 +2196,13 @@ def: InstRW<[SKXWriteResGroup92], (instregex "VMOVSDZrm(b?)", "VPUNPCKLWDZ128rm(b?)", "(V?)PUNPCKLWDrm")>; +def SKXWriteResGroup92a : SchedWriteRes<[SKXPort5,SKXPort23]> { + let Latency = 6; + let NumMicroOps = 2; + let ResourceCycles = [1,1]; +} +def: InstRW<[SKXWriteResGroup92a], (instregex "MMX_PSHUFBrm")>; + def SKXWriteResGroup93 : SchedWriteRes<[SKXPort5,SKXPort015]> { let Latency = 7; let NumMicroOps = 2; @@ -2629,22 +2638,6 @@ def: InstRW<[SKXWriteResGroup119], (instregex "FCOM32m", "FCOMP64m", "MMX_PSADBWirm", "VFPCLASSSDrm(b?)", - "VPACKSSDWYrm", - "VPACKSSDWZ256rm(b?)", - "VPACKSSDWZrm(b?)", - "VPACKSSWBYrm", - "VPACKSSWBZ256rm(b?)", - "VPACKSSWBZrm(b?)", - "VPACKUSDWYrm", - "VPACKUSDWZ256rm(b?)", - "VPACKUSDWZrm(b?)", - "VPACKUSWBYrm", - "VPACKUSWBZ256rm(b?)", - "VPACKUSWBZrm(b?)", - "VPALIGNRYrmi", - "VPALIGNRZ256rmi(b?)", - "VPALIGNRZrmi(b?)", - "VPBLENDWYrmi", "VPBROADCASTBYrm", "VPBROADCASTBZ256m(b?)", "VPBROADCASTBZm(b?)", @@ -2653,47 +2646,7 @@ def: InstRW<[SKXWriteResGroup119], (instregex "FCOM32m", "VPBROADCASTWZm(b?)", "VPMOVSXBDYrm", "VPMOVSXBQYrm", - "VPMOVSXWQYrm", - "VPSHUFBYrm", - "VPSHUFBZ256rm(b?)", - "VPSHUFBZrm(b?)", - "VPSHUFDYmi", - "VPSHUFDZ256m(b?)i", - "VPSHUFDZm(b?)i", - "VPSHUFHWYmi", - "VPSHUFHWZ256mi(b?)", - "VPSHUFHWZmi(b?)", - "VPSHUFLWYmi", - "VPSHUFLWZ256mi(b?)", - "VPSHUFLWZmi(b?)", - "VPSLLDQZ256rm(b?)", - "VPSLLDQZrm(b?)", - "VPSRLDQZ256rm(b?)", - "VPSRLDQZrm(b?)", - "VPUNPCKHBWYrm", - "VPUNPCKHBWZ256rm(b?)", - "VPUNPCKHBWZrm(b?)", - "VPUNPCKHDQYrm", - "VPUNPCKHDQZ256rm(b?)", - "VPUNPCKHDQZrm(b?)", - "VPUNPCKHQDQYrm", - "VPUNPCKHQDQZ256rm(b?)", - "VPUNPCKHQDQZrm(b?)", - "VPUNPCKHWDYrm", - "VPUNPCKHWDZ256rm(b?)", - "VPUNPCKHWDZrm(b?)", - "VPUNPCKLBWYrm", - "VPUNPCKLBWZ256rm(b?)", - "VPUNPCKLBWZrm(b?)", - "VPUNPCKLDQYrm", - "VPUNPCKLDQZ256rm(b?)", - "VPUNPCKLDQZrm(b?)", - "VPUNPCKLQDQYrm", - "VPUNPCKLQDQZ256rm(b?)", - "VPUNPCKLQDQZrm(b?)", - "VPUNPCKLWDYrm", - "VPUNPCKLWDZ256rm(b?)", - "VPUNPCKLWDZrm(b?)")>; + "VPMOVSXWQYrm")>; def SKXWriteResGroup120 : SchedWriteRes<[SKXPort01,SKXPort23]> { let Latency = 8; diff --git a/llvm/lib/Target/X86/X86Schedule.td b/llvm/lib/Target/X86/X86Schedule.td index 433f5b10441..a264086d7ef 100644 --- a/llvm/lib/Target/X86/X86Schedule.td +++ b/llvm/lib/Target/X86/X86Schedule.td @@ -139,9 +139,13 @@ defm WriteVecShift : X86SchedWritePair; // Vector integer shifts. defm WriteVecIMul : X86SchedWritePair; // Vector integer multiply. defm WritePMULLD : X86SchedWritePair; // PMULLD defm WriteShuffle : X86SchedWritePair; // Vector shuffles. +defm WriteShuffleY : X86SchedWritePair; // Vector shuffles (YMM/ZMM). defm WriteVarShuffle : X86SchedWritePair; // Vector variable shuffles. +defm WriteVarShuffleY : X86SchedWritePair; // Vector variable shuffles (YMM/ZMM). defm WriteBlend : X86SchedWritePair; // Vector blends. +defm WriteBlendY : X86SchedWritePair; // Vector blends (YMM/ZMM). defm WriteVarBlend : X86SchedWritePair; // Vector variable blends. +defm WriteVarBlendY : X86SchedWritePair; // Vector variable blends (YMM/ZMM). defm WritePSADBW : X86SchedWritePair; // Vector PSADBW. defm WriteMPSAD : X86SchedWritePair; // Vector MPSAD. defm WritePHMINPOS : X86SchedWritePair; // Vector PHMINPOS. @@ -264,15 +268,15 @@ def SchedWritePSADBW def SchedWriteShuffle : X86SchedWriteWidths; + WriteShuffleY, WriteShuffleY>; def SchedWriteVarShuffle : X86SchedWriteWidths; + WriteVarShuffleY, WriteVarShuffleY>; def SchedWriteBlend - : X86SchedWriteWidths; + : X86SchedWriteWidths; def SchedWriteVarBlend : X86SchedWriteWidths; + WriteVarBlendY, WriteVarBlendY>; //===----------------------------------------------------------------------===// // Generic Processor Scheduler Models. diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td index d0222660416..3eeeec067bc 100644 --- a/llvm/lib/Target/X86/X86ScheduleAtom.td +++ b/llvm/lib/Target/X86/X86ScheduleAtom.td @@ -261,9 +261,13 @@ defm : AtomWriteResPair; defm : AtomWriteResPair; defm : AtomWriteResPair; +defm : AtomWriteResPair; defm : AtomWriteResPair; +defm : AtomWriteResPair; defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. +defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. +defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. defm : AtomWriteResPair; // NOTE: Doesn't exist on Atom. diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 7d32bc67d14..9740722e613 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -411,9 +411,13 @@ defm : JWriteResFpuPair; defm : JWriteResFpuPair; defm : JWriteResFpuPair; defm : JWriteResFpuPair; +defm : JWriteResFpuPair; defm : JWriteResFpuPair; +defm : JWriteResFpuPair; defm : JWriteResFpuPair; +defm : JWriteResFpuPair; defm : JWriteResFpuPair; +defm : JWriteResFpuPair; defm : JWriteResFpuPair; defm : JWriteResFpuPair; // NOTE: Doesn't exist on Jaguar. defm : JWriteResFpuPair; diff --git a/llvm/lib/Target/X86/X86ScheduleSLM.td b/llvm/lib/Target/X86/X86ScheduleSLM.td index c0df1ff4032..1bc522f9363 100644 --- a/llvm/lib/Target/X86/X86ScheduleSLM.td +++ b/llvm/lib/Target/X86/X86ScheduleSLM.td @@ -171,8 +171,11 @@ defm : SLMWriteResPair; //defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; +defm : SLMWriteResPair; defm : SLMWriteResPair; +defm : SLMWriteResPair; defm : SLMWriteResPair; +defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; @@ -290,6 +293,7 @@ def : WriteRes; def : WriteRes; defm : SLMWriteResPair; defm : SLMWriteResPair; +defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; defm : SLMWriteResPair; diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index e8230d85733..7c70e345ed3 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -203,6 +203,7 @@ defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; +defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; @@ -241,8 +242,11 @@ defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; // FIXME defm : ZnWriteResFpuPair; +defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; +defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; +defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; defm : ZnWriteResFpuPair; -- cgit v1.2.3