From 54829ec5d037e59f07962884bcc6c21441e60f01 Mon Sep 17 00:00:00 2001
From: Diana Picus <diana.picus@linaro.org>
Date: Fri, 1 Mar 2019 10:12:28 +0000
Subject: [ARM GlobalISel] Support G_CTLZ for Thumb2

Same as ARM mode but with different opcode.

llvm-svn: 355191
---
 llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 7 -------
 1 file changed, 7 deletions(-)

(limited to 'llvm/lib/Target')

diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 26c7a98c207..82817d3b5ad 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -206,13 +206,6 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
 
   getActionDefinitionsBuilder({G_FREM, G_FPOW}).libcallFor({s32, s64});
 
-  if (ST.isThumb()) {
-    // FIXME: merge with the code for non-Thumb.
-    computeTables();
-    verify(*ST.getInstrInfo());
-    return;
-  }
-
   if (ST.hasV5TOps()) {
     getActionDefinitionsBuilder(G_CTLZ)
         .legalFor({s32, s32})
-- 
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