From 2fb357a5b02832bd9af54fc0611c061a62d3c549 Mon Sep 17 00:00:00 2001 From: Eli Friedman Date: Wed, 28 Sep 2011 21:00:25 +0000 Subject: PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them. llvm-svn: 140723 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'llvm/lib/Target') diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index cab9161f5a3..fc2d5ce64e8 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -8555,6 +8555,13 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) const { if (Swap) std::swap(Op0, Op1); + // Check that the operation in question is available (most are plain SSE2, + // but PCMPGTQ and PCMPEQQ have different requirements). + if (Opc == X86ISD::PCMPGTQ && !Subtarget->hasSSE42() && !Subtarget->hasAVX()) + return SDValue(); + if (Opc == X86ISD::PCMPEQQ && !Subtarget->hasSSE41() && !Subtarget->hasAVX()) + return SDValue(); + // Since SSE has no unsigned integer comparisons, we need to flip the sign // bits of the inputs before performing those operations. if (FlipSigns) { -- cgit v1.2.3