From 12da0f9c3d9a5a1ec91f339f45c99dd8f27eb869 Mon Sep 17 00:00:00 2001
From: Thomas Lively <tlively@google.com>
Date: Tue, 25 Sep 2018 03:39:28 +0000
Subject: [WebAssembly] SIMD sqrt

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52387

llvm-svn: 342937
---
 llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'llvm/lib/Target')

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 9fe96ddb77a..a44a83995f6 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -212,6 +212,12 @@ multiclass SIMDAbs<ValueType vec_t, string vec, bits<32> simdop> {
                            [(set (vec_t V128:$dst), (vec_t (fabs V128:$vec)))],
                            vec#".abs\t$dst, $vec", vec#".abs", simdop>;
 }
+multiclass SIMDSqrt<ValueType vec_t, string vec, bits<32> simdop> {
+  defm SQRT_#vec_t :
+    SIMD_I<(outs V128:$dst), (ins V128:$vec), (outs), (ins),
+           [(set (vec_t V128:$dst), (vec_t (fsqrt V128:$vec)))],
+           vec#".sqrt\t$dst, $vec", vec#".sqrt", simdop>;
+}
 
 let Defs = [ARGUMENTS] in {
 defm "" : ConstVec<v16i8,
@@ -371,6 +377,9 @@ defm GE : SIMDConditionFP<"ge", SETOGE, 123>;
 defm "" : SIMDAbs<v4f32, "f32x4", 127>;
 defm "" : SIMDAbs<v2f64, "f64x2", 128>;
 
+defm "" : SIMDSqrt<v4f32, "f32x4", 141>;
+defm "" : SIMDSqrt<v2f64, "f64x2", 142>;
+
 } // Defs = [ARGUMENTS]
 
 // Def load and store patterns from WebAssemblyInstrMemory.td for vector types
-- 
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