From 820e1326d726f8219b0de369f8dc14c666197c17 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 27 Oct 2016 15:27:00 +0000 Subject: [X86][AVX512DQ] Improve lowering of MUL v2i64 and v4i64 With DQI but without VLX, lower v2i64 and v4i64 MUL operations with v8i64 MUL (vpmullq). Updated cost table accordingly. Differential Revision: https://reviews.llvm.org/D26011 llvm-svn: 285304 --- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'llvm/lib/Target/X86/X86TargetTransformInfo.cpp') diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index a2cc73addf4..f8d3a04c367 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -204,6 +204,19 @@ int X86TTIImpl::getArithmeticInstrCost( return LT.first * Entry->Cost; } + static const CostTblEntry AVX512DQCostTable[] = { + { ISD::MUL, MVT::v2i64, 1 }, + { ISD::MUL, MVT::v4i64, 1 }, + { ISD::MUL, MVT::v8i64, 1 } + }; + + // Look for AVX512DQ lowering tricks for custom cases. + if (ST->hasDQI()) { + if (const auto *Entry = CostTableLookup(AVX512DQCostTable, ISD, + LT.second)) + return LT.first * Entry->Cost; + } + static const CostTblEntry AVX512BWCostTable[] = { // Vectorizing division is a bad idea. See the SSE2 table for more comments. { ISD::SDIV, MVT::v64i8, 64*20 }, -- cgit v1.2.3