From 20caee95e1aacb604ed1f7f946debeb58b793c8e Mon Sep 17 00:00:00 2001
From: Mohammed Agabaria <mohammed.agabaria@intel.com>
Date: Wed, 25 Jan 2017 09:14:48 +0000
Subject: [X86] enable memory interleaving for X86\SLM arch.

Differential Revision: https://reviews.llvm.org/D28547

llvm-svn: 293040
---
 llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'llvm/lib/Target/X86/X86TargetTransformInfo.cpp')

diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 073584870bb..bd7fa9ca617 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -2147,7 +2147,7 @@ bool X86TTIImpl::enableInterleavedAccessVectorization() {
   // TODO: We expect this to be beneficial regardless of arch,
   // but there are currently some unexplained performance artifacts on Atom.
   // As a temporary solution, disable on Atom.
-  return !(ST->isAtom() || ST->isSLM());
+  return !(ST->isAtom());
 }
 
 // Get estimation for interleaved load/store operations and strided load.
-- 
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