From 8f1646b579c4ab68c663c92e480b4a10d9c4d70e Mon Sep 17 00:00:00 2001
From: Gabor Buella <gabor.buella@intel.com>
Date: Mon, 16 Apr 2018 07:47:35 +0000
Subject: [X86] Introduce archs: goldmont-plus & tremont

Using Goldmont's cost tables for these two upcoming
atom archs.

Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45612

llvm-svn: 330109
---
 llvm/lib/Target/X86/X86Subtarget.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

(limited to 'llvm/lib/Target/X86/X86Subtarget.h')

diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index 894aef20e0e..4665e2ddf18 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -56,6 +56,8 @@ public:
     IntelAtom,
     IntelSLM,
     IntelGLM,
+    IntelGLP,
+    IntelTRM,
     IntelHaswell,
     IntelBroadwell,
     IntelSkylake,
@@ -660,7 +662,11 @@ public:
   /// TODO: to be removed later and replaced with suitable properties
   bool isAtom() const { return X86ProcFamily == IntelAtom; }
   bool isSLM() const { return X86ProcFamily == IntelSLM; }
-  bool isGLM() const { return X86ProcFamily == IntelGLM; }
+  bool isGLM() const {
+    return X86ProcFamily == IntelGLM ||
+           X86ProcFamily == IntelGLP ||
+           X86ProcFamily == IntelTRM;
+  }
   bool useSoftFloat() const { return UseSoftFloat; }
 
   /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
-- 
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