From 0ae8d4d73881b882676a680ba2857a271c5cc00a Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 16 Oct 2011 07:05:40 +0000 Subject: Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. llvm-svn: 142117 --- llvm/lib/Target/X86/X86InstrSystem.td | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/lib/Target/X86/X86InstrSystem.td') diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td index 05a5b36b95e..b5651f314c3 100644 --- a/llvm/lib/Target/X86/X86InstrSystem.td +++ b/llvm/lib/Target/X86/X86InstrSystem.td @@ -465,3 +465,12 @@ let Predicates = [In64BitMode] in { def WRGSBASE64 : RI<0xAE, MRM3r, (outs), (ins GR64:$dst), "wrgsbase{q}\t$dst", []>, TB, XS; } + +//===----------------------------------------------------------------------===// +// INVPCID Instruction +def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2), + "invpcid {$src2, $src1|$src1, $src2}", []>, OpSize, T8, + Requires<[In32BitMode]>; +def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2), + "invpcid {$src2, $src1|$src1, $src2}", []>, OpSize, T8, + Requires<[In64BitMode]>; -- cgit v1.2.3