From da7e78e18caed56900c7df208bf8ed98d94ac112 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 10 Dec 2017 04:07:28 +0000 Subject: [X86] Rename the rb form of scalar ADD/SUB/MUL/DIV to include _Int since they can only be selected by intrinsics. llvm-svn: 320283 --- llvm/lib/Target/X86/X86InstrInfo.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp') diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 8eeb571231e..0e71cc13070 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -10109,9 +10109,9 @@ bool X86InstrInfo::isHighLatencyDef(int opc) const { case X86::VDIVSDZrr_Int: case X86::VDIVSDZrr_Intk: case X86::VDIVSDZrr_Intkz: - case X86::VDIVSDZrrb: - case X86::VDIVSDZrrbk: - case X86::VDIVSDZrrbkz: + case X86::VDIVSDZrrb_Int: + case X86::VDIVSDZrrb_Intk: + case X86::VDIVSDZrrb_Intkz: case X86::VDIVSSZrm: case X86::VDIVSSZrr: case X86::VDIVSSZrm_Int: @@ -10120,9 +10120,9 @@ bool X86InstrInfo::isHighLatencyDef(int opc) const { case X86::VDIVSSZrr_Int: case X86::VDIVSSZrr_Intk: case X86::VDIVSSZrr_Intkz: - case X86::VDIVSSZrrb: - case X86::VDIVSSZrrbk: - case X86::VDIVSSZrrbkz: + case X86::VDIVSSZrrb_Int: + case X86::VDIVSSZrrb_Intk: + case X86::VDIVSSZrrb_Intkz: case X86::VSQRTPDZ128m: case X86::VSQRTPDZ128mb: case X86::VSQRTPDZ128mbk: -- cgit v1.2.3