From 6cab60fa068f9127c02246b740aa9b75523a33d2 Mon Sep 17 00:00:00 2001 From: Sander de Smalen Date: Mon, 3 Sep 2018 09:15:58 +0000 Subject: Extend hasStoreToStackSlot with list of FI accesses. For instructions that spill/fill to and from multiple frame-indices in a single instruction, hasStoreToStackSlot and hasLoadFromStackSlot should return an array of accesses, rather than just the first encounter of such an access. This better describes FI accesses for AArch64 (paired) LDP/STP instructions. Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB Reviewed By: MatzeB Differential Revision: https://reviews.llvm.org/D51537 llvm-svn: 341301 --- llvm/lib/Target/X86/X86InstrInfo.cpp | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp') diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index f6d8e2cbc4c..06a4d1f86ce 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -411,8 +411,11 @@ unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI, if ((Reg = isLoadFromStackSlot(MI, FrameIndex))) return Reg; // Check for post-frame index elimination operations - const MachineMemOperand *Dummy; - return hasLoadFromStackSlot(MI, Dummy, FrameIndex); + SmallVector Accesses; + if (hasLoadFromStackSlot(MI, Accesses)) { + FrameIndex = Accesses.begin()->FI; + return 1; + } } return 0; } @@ -441,8 +444,11 @@ unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI, if ((Reg = isStoreToStackSlot(MI, FrameIndex))) return Reg; // Check for post-frame index elimination operations - const MachineMemOperand *Dummy; - return hasStoreToStackSlot(MI, Dummy, FrameIndex); + SmallVector Accesses; + if (hasStoreToStackSlot(MI, Accesses)) { + FrameIndex = Accesses.begin()->FI; + return 1; + } } return 0; } -- cgit v1.2.3