From b7a15acd38ec1302639e0fff752e01472620b5b8 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 26 Jan 2019 20:13:44 +0000 Subject: [X86] Fold X86ISD::SBB(ISD::SUB(X,Y),0) -> X86ISD::SBB(X,Y) (PR25858) We often generate X86ISD::SBB(X, 0) for carry flag arithmetic. I had tried to create test cases for the ADC equivalent (which often uses the same pattern) but haven't managed to find anything yet. Differential Revision: https://reviews.llvm.org/D57169 llvm-svn: 352288 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp') diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a069b579f9d..ec652e5ca5e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -40566,6 +40566,15 @@ static SDValue combineSBB(SDNode *N, SelectionDAG &DAG) { Flags); } + // Fold SBB(SUB(X,Y),0,Carry) -> SBB(X,Y,Carry) + // iff the flag result is dead. + SDValue Op0 = N->getOperand(0); + SDValue Op1 = N->getOperand(1); + if (Op0.getOpcode() == ISD::SUB && isNullConstant(Op1) && + !N->hasAnyUseOfValue(1)) + return DAG.getNode(X86ISD::SBB, SDLoc(N), N->getVTList(), Op0.getOperand(0), + Op0.getOperand(1), N->getOperand(2)); + return SDValue(); } -- cgit v1.2.3