From 703fbde3cbd7fdd000ad5af9f7055c50c2641441 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 3 Oct 2018 19:48:26 +0000 Subject: [X86] Add CMOV pseudos for VR128X and VR256X register classes. Use them when AVX512VL is enabled. This allows the phi nodes to be generated with the correct register class when expanded. llvm-svn: 343710 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp') diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b89b2b6e720..cb79484d26e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -27464,7 +27464,9 @@ static bool isCMOVPseudo(MachineInstr &MI) { case X86::CMOV_RFP64: case X86::CMOV_RFP80: case X86::CMOV_VR128: + case X86::CMOV_VR128X: case X86::CMOV_VR256: + case X86::CMOV_VR256X: case X86::CMOV_VR512: case X86::CMOV_VK8: case X86::CMOV_VK16: @@ -29060,7 +29062,9 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, case X86::CMOV_RFP64: case X86::CMOV_RFP80: case X86::CMOV_VR128: + case X86::CMOV_VR128X: case X86::CMOV_VR256: + case X86::CMOV_VR256X: case X86::CMOV_VR512: case X86::CMOV_VK8: case X86::CMOV_VK16: -- cgit v1.2.3