From 3d9b47c770d1f50a1d6f4f07fd32069f132ff57d Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 15 Apr 2019 18:39:45 +0000 Subject: [X86] Block i32/i64 for 'k' and 'Yk' in getRegForInlineAsmConstraint without avx512bw. 32 and 64 bit k-registers require avx512bw. If we don't block this properly, it leads to a crash. llvm-svn: 358436 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 45 +++++++++++++++------------------ 1 file changed, 21 insertions(+), 24 deletions(-) (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp') diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index c63ea39292f..514df8ccc09 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -43618,20 +43618,18 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, // in the normal allocation? case 'k': if (Subtarget.hasAVX512()) { - // Only supported in AVX512 or later. - switch (VT.SimpleTy) { - default: break; - case MVT::i32: - return std::make_pair(0U, &X86::VK32RegClass); - case MVT::i16: - return std::make_pair(0U, &X86::VK16RegClass); - case MVT::i8: - return std::make_pair(0U, &X86::VK8RegClass); - case MVT::i1: + if (VT == MVT::i1) return std::make_pair(0U, &X86::VK1RegClass); - case MVT::i64: + if (VT == MVT::i8) + return std::make_pair(0U, &X86::VK8RegClass); + if (VT == MVT::i16) + return std::make_pair(0U, &X86::VK16RegClass); + } + if (Subtarget.hasBWI()) { + if (VT == MVT::i32) + return std::make_pair(0U, &X86::VK32RegClass); + if (VT == MVT::i64) return std::make_pair(0U, &X86::VK64RegClass); - } } break; case 'q': // GENERAL_REGS in 64-bit mode, Q_REGS in 32-bit mode. @@ -43753,20 +43751,19 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, return std::make_pair(X86::XMM0, &X86::VR128RegClass); case 'k': // This register class doesn't allocate k0 for masked vector operation. - if (Subtarget.hasAVX512()) { // Only supported in AVX512. - switch (VT.SimpleTy) { - default: break; - case MVT::i32: - return std::make_pair(0U, &X86::VK32WMRegClass); - case MVT::i16: - return std::make_pair(0U, &X86::VK16WMRegClass); - case MVT::i8: - return std::make_pair(0U, &X86::VK8WMRegClass); - case MVT::i1: + if (Subtarget.hasAVX512()) { + if (VT == MVT::i1) return std::make_pair(0U, &X86::VK1WMRegClass); - case MVT::i64: + if (VT == MVT::i8) + return std::make_pair(0U, &X86::VK8WMRegClass); + if (VT == MVT::i16) + return std::make_pair(0U, &X86::VK16WMRegClass); + } + if (Subtarget.hasBWI()) { + if (VT == MVT::i32) + return std::make_pair(0U, &X86::VK32WMRegClass); + if (VT == MVT::i64) return std::make_pair(0U, &X86::VK64WMRegClass); - } } break; } -- cgit v1.2.3