From 68a8efa374740a0829e77f57c8a2b13bead85d7f Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Tue, 2 Feb 2016 01:44:03 +0000 Subject: [X86][FastISel] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR. FastISel counterpart to r259448. llvm-svn: 259449 --- llvm/lib/Target/X86/X86FastISel.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/X86/X86FastISel.cpp') diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index f48b47934e0..854a4e7932e 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -2294,8 +2294,10 @@ bool X86FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) { // register class VR128 by method 'constrainOperandRegClass' which is // directly called by 'fastEmitInst_ri'. // Instruction VCVTPS2PHrr takes an extra immediate operand which is - // used to provide rounding control. - InputReg = fastEmitInst_ri(X86::VCVTPS2PHrr, RC, InputReg, false, 0); + // used to provide rounding control: use MXCSR.RC, encoded as 0b100. + // It's consistent with the other FP instructions, which are usually + // controlled by MXCSR. + InputReg = fastEmitInst_ri(X86::VCVTPS2PHrr, RC, InputReg, false, 4); // Move the lower 32-bits of ResultReg to another register of class GR32. ResultReg = createResultReg(&X86::GR32RegClass); -- cgit v1.2.3