From 4aa25b79f941abd481266c5fb506354477a92ddf Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 7 Apr 2009 22:35:25 +0000 Subject: Temporarily revert r68552. This was causing a failure in the self-hosting LLVM builds. --- Reverse-merging (from foreign repository) r68552 into '.': U test/CodeGen/X86/tls8.ll U test/CodeGen/X86/tls10.ll U test/CodeGen/X86/tls2.ll U test/CodeGen/X86/tls6.ll U lib/Target/X86/X86Instr64bit.td U lib/Target/X86/X86InstrSSE.td U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86RegisterInfo.cpp U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86CodeEmitter.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86InstrInfo.h U lib/Target/X86/X86ISelDAGToDAG.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86ISelLowering.h U lib/Target/X86/X86InstrInfo.cpp U lib/Target/X86/X86InstrBuilder.h U lib/Target/X86/X86RegisterInfo.td llvm-svn: 68560 --- llvm/lib/Target/X86/X86CodeEmitter.cpp | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp') diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index c54a996cb23..7c998382fc7 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -533,6 +533,23 @@ void Emitter::emitInstruction(const MachineInstr &MI, case X86::DWARF_LOC: case X86::FP_REG_KILL: break; + case X86::TLS_tp: { + MCE.emitByte(BaseOpcode); + unsigned RegOpcodeField = getX86RegNum(MI.getOperand(0).getReg()); + MCE.emitByte(ModRMByte(0, RegOpcodeField, 5)); + emitConstant(0, 4); + break; + } + case X86::TLS_gs_ri: { + MCE.emitByte(BaseOpcode); + unsigned RegOpcodeField = getX86RegNum(MI.getOperand(0).getReg()); + MCE.emitByte(ModRMByte(0, RegOpcodeField, 5)); + GlobalValue* GV = MI.getOperand(1).getGlobal(); + unsigned rt = Is64BitMode ? X86::reloc_pcrel_word + : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); + emitGlobalAddress(GV, rt); + break; + } case X86::MOVPC32r: { // This emits the "call" portion of this pseudo instruction. MCE.emitByte(BaseOpcode); @@ -644,21 +661,13 @@ void Emitter::emitInstruction(const MachineInstr &MI, break; case X86II::MRMSrcMem: { - // FIXME: Maybe lea should have its own form? - int AddrOperands; - if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r || - Opcode == X86::LEA16r || Opcode == X86::LEA32r) - AddrOperands = X86AddrNumOperands - 1; // No segment register - else - AddrOperands = X86AddrNumOperands; - - intptr_t PCAdj = (CurOp + AddrOperands + 1 != NumOps) ? + intptr_t PCAdj = (CurOp + X86AddrNumOperands + 1 != NumOps) ? X86InstrInfo::sizeOfImm(Desc) : 0; MCE.emitByte(BaseOpcode); emitMemModRMByte(MI, CurOp+1, getX86RegNum(MI.getOperand(CurOp).getReg()), PCAdj); - CurOp += AddrOperands + 1; + CurOp += X86AddrNumOperands + 1; if (CurOp != NumOps) emitConstant(MI.getOperand(CurOp++).getImm(), X86InstrInfo::sizeOfImm(Desc)); break; -- cgit v1.2.3