From b1913c4df9a77821d1d399a277b9d8366addc94b Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Thu, 11 Feb 2010 22:57:32 +0000
Subject: enhance llvm-mc -show-inst to print the enum of an instruction, like
 so:

	testb	%al, %al                ## <MCInst #2412 TEST8rr
                                        ##   <MCOperand Reg:2>
                                        ##   <MCOperand Reg:2>>
	jne	LBB1_7                  ## <MCInst #938 JNE_1
                                        ##   <MCOperand Expr:(LBB1_7)>>

llvm-svn: 95935
---
 llvm/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'llvm/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp')

diff --git a/llvm/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
index 4274d0a436c..610beb550b2 100644
--- a/llvm/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
+++ b/llvm/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
@@ -24,10 +24,14 @@ using namespace llvm;
 
 // Include the auto-generated portion of the assembly writer.
 #define MachineInstr MCInst
+#define GET_INSTRUCTION_NAME
 #include "X86GenAsmWriter1.inc"
 #undef MachineInstr
 
 void X86IntelInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
+StringRef X86IntelInstPrinter::getOpcodeName(unsigned Opcode) const {
+  return getInstructionName(Opcode);
+}
 
 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
   switch (MI->getOperand(Op).getImm()) {
-- 
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