From 3a93756dfbb0dcb7c62fcbe5b0ab8f8591fc9721 Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Fri, 13 Dec 2019 17:08:04 -0800 Subject: [WebAssembly] Replace SIMD int min/max builtins with patterns Summary: The instructions were originally implemented via builtins and intrinsics so users would have to explicitly opt-in to using them. This was useful while were validating whether these instructions should have been merged into the spec proposal. Now that they have been, we can use normal codegen patterns, so the intrinsics and builtins are no longer useful. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D71500 --- llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp') diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 7b972eda27e..5b177c0c5d9 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -181,6 +181,13 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setOperationAction(Op, MVT::v2i64, Expand); } + // But we do have integer min and max operations + if (Subtarget->hasUnimplementedSIMD128()) { + for (auto Op : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) + for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) + setOperationAction(Op, T, Legal); + } + // Expand float operations supported for scalars but not SIMD for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, -- cgit v1.2.3